1. Field of the Invention
This invention relates generally to an improved semiconductor device, and more particularly to an improved design for semiconductor devices having a plurality of junctions covered with a passivating layer on the surface thereof.
In the semiconductor devices, for example, a so-called planar-type transistor on which an insulating layer such as silicon dioxide SiO.sub.2 is deposited, an inversion layer appears at the surface beneath the silicon dioxide layer. When the inversion layer extends from a PN junction to an edge of a semiconductor body, that is, a scribed portion of the semiconductor device, the leakage current across the PN junction increases while the break-down voltage of the PN junction decreases.
2. Description of the Prior Art
Such an improved transistor is known in the art for avoiding the above induced inversion layer that, on the surface of a semiconductor substrate of a low impurity concentration where the inversion layer is apt to be induced, there is provided a ring-shaped region whose conductivity type is same as that of the semiconductor substrate and whose impurity concentration is higher than that of the semiconductor substrate. The ring-shaped region is called generally a channel stopper region or an anti-channel region. The structure of the above transistor will be described later with reference to FIG. 1 in delail.